New Robots Require New Ways to Think About Processors

We’re on the cusp of a revolution in robots. After years of relatively moderate growth, sales of commercial and industrial robots are slated to grow by 25% to 35% per year over the next decade, according to Boston Consulting Group, and could reach $260 billion by 2030 to meet the demands of manufacturers, retailers and others to streamline supply chains, enhance safety and boost productivity. 

Just as important, AI and other advances in technology will pave the way for more valuable, versatile robots that can take on a wider variety of more complex tasks. Traditionally fixed-function/fixed-task robots will be supplemented with computer vision and other technologies to allow them to detect production drift or variations in quality. Collaborative robots, or cobots, will work alongside humans, handling delicate materials for humans or serving as a third arm for maintenance technicians instead of being isolated behind a safety fence like fixed-function robots are today. 

Autonomous mobile robots for helping run ‘lights out’ warehouses and production facilities are also on the rise as a way to reduce energy and increase safety. 

Achieving this potential, however, will also require fundamental changes in computing platforms. More powerful and responsive processors for performing more complex tasks while also meeting higher levels of redundancy and safety will be needed. Economics will be a growing consideration too as use cases expand: given the need for redundancy, existing architectures tend to be expensive to implement and power hungry. 

With robots often having a service lifetime that can stretch into decades, robotic microprocessors will also have to become more readily reprogrammable so they can handle new tasks and software applications. 

A blueprint for safety

To avoid the unfolding of safety hazards, industrial robots must offer safety robustness with respect to the detection and prompt handling of faults. Evidence of such capabilities is usually shown via ISO 13849 PL d Category 3 architectural compliance which, in current industry practice, is achieved via redundant channels for all safety-related functions.

Given the need for redundancy, existing architectures that meet PL d Category 3 utilize different boards or components altogether, for duplicating safety functions. However, this strategy tends to be expensive to implement and power hungry. This poses a challenge especially, to the deployment of smaller and power constrained industrial robots.

To this end, Arm has developed a white paper that discusses two different SoC-based concepts for building articulating arm robots that meet the guidelines of ISO 13849-1/4 and IEC 61508-2, two widely adopted performance specification standards for industrial and commercial robots. The paper outlines the necessary safety standards and procedures an SoC must achieve to meet the PL d Category 3 rating under the guidelines, how redundancy can be implemented in an SoC, how to design SoCs for accurately controlling a robotic arm along degrees of motion and how to establish low-latency communication links between robots, humans, and sensors, among other topics. 

When compared to current architectures, the concepts, offer a promising solution for deployments in need of small form-factors and low power consumption, while still meeting the safety robustness requirements for achieving PL d Category 3 compliance.

TÜV SÜD Rail GmbH–an international testing, inspection and certification company—examined Arm processors deployed in two different scenarios and found that both would be able to fulfill the safety requirements for PL d Category 3.  

In the first, we examine an architecture of an SoC based on Arm processors such as the Arm Cortex-A53, Arm Cortex-A76 or Arm Cortex-R82 for a robot working in conjunction with robots or/or humans. Redundancy is achieved by utilizing two processor cores. The architecture is similar to existing robot designs: manufacturers that shift to Arm-based processors would be able to retain much of their original software stack. 

In the second, the dual channel redundancy is achieved via two separated virtual machines running on a single Cortex A core with dual-core lockstep capability. The A core is responsible for performing functions related to actuation and handling of robot communications. A less powerful M-Class core acts as a supervisor of the main processor by notifying the main processor and managing its transition into safe states when a hazardous event is detected. The second concept is optimal for freshly new deployments where software stack portability from legacy implementations is not a concern. Furthermore, by being based on virtualization, the second concept is aligned with trends such as cloud-native deployment.

As general benefits against state-of-the-art practices, both concepts enable the deployment of more power efficient robots while maintaining a small form factor.

Addition by integration

How fast and how far will robotics evolve? One possible analogy lay in the field of automotive. Automotive digital platforms, until recently, were based around networks of largely independent microcontrollers. In the past, vehicle manufacturers would brag about the number of microprocessors their vehicles might contain. 

Over the last several years, however, they have gravitated toward zonal processors, larger, more capable processors that can manage multiple functions. These zonal SoCs also often combine CPUs, GPUs, dedicated image processors, and real time processors for better performance and energy efficiency. Hardware-hardened partitions, meanwhile, permit combining critical functions along with functions such as entertainment and navigation on the same die. 

Standards initiatives have likewise helped create tighter cooperation between the auto industry and the wider software industry. Although the number of processors per vehicle might be down, the lines of code in a single car—along with the overall functionality and capability of a car’s digital platform—are expected to explode.

Robots share many of the same characteristics as vehicles. Processing must be performed in real time and the number of variables and input to be considered is growing exponentially. Manufacturers have to build a path for future applications and services and, at the same time, ensure safety is never compromised. Just as important, hardware and software providers have to work within often tight thermal, volumetric and economic envelopes. Upgradeability is also paramount: products have to be capable of state-of-the-art functionality and capable of operating for 20 years or more.

Robotics companies and their customers are at a turning point in their history. Arm is dedicated to developing a computing platform to help them shift from the world of static, fixed-function robots to one where factories can be more flexible and versatile to meet the changing needs of the economy. This white paper is one of many steps we are taking. And, if you find yourself drawn to robotics, please send me a note.  

Meanwhile, you can download the white paper on safety concepts for robots built on Arm-based SoCs here.

(This story first appeared in Semiconductor Engineering).

(Lidwine Martinot and Antonio Priore also contributed to this article).